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rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a +5 v powered cmos rs-232 drivers/receivers ADM223/adm230lCadm241l one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 world wide web site: http://www.analog.com fax: 617/326-8703 ? analog devices, inc., 1997 adm232l typical operating circuit table i. selection table no. of no. of low power ttl part power rs-232 rs-232 external shutdown three-state no. of number supply voltage drivers receivers capacitors (sd) en pins ADM223 +5 v 4 5 4 yes ( sd ) yes (en) 28 adm230l +5 v 5 0 4 yes no 20 adm231l +5 v & +7.5 v to +13.2 v 2 2 2 no no 14 adm232l +5 v 2 2 4 no no 16 adm233l +5 v 2 2 none no no 20 adm234l +5 v 4 0 4 no no 16 adm235l +5 v 5 5 none yes yes 24 adm236l +5 v 4 3 4 yes yes 24 adm237l +5 v 5 3 4 no no 24 adm238l +5 v 4 4 4 no no 24 adm239l +5 v & +7.5 v to +13.2 v 3 5 2 no yes 24 adm241l +5 v 4 5 4 yes yes 28 features single 5 v power supply meets all eia-232-e and v.28 specifications 120 kb/s data rate on-board dc-dc converters 6 9 v output swing with +5 v supply small 1 m f capacitors low power shutdown 1 m a receivers active in shutdown (ADM223) esd > 2 kv 6 30 v receiver input levels latch-up free plug-in upgrade for max223/230-241 plug-in upgrade for ad230Cad241 applications computers peripherals modems printers instruments general description the adm2xx family of line drivers/receivers is intended for all eia-232-e and v.28 communications interfaces, especially in applications where 12 v is not available. the ADM223, adm230l, adm235l, adm236l and adm241l feature a low power shutdown mode that reduces power dissipation to less than 5 m w, making them ideally suited for battery powered equipment. two receivers remain enabled during shutdown on the ADM223. the adm233l and adm235l do not require any external components and are particularly useful in applica- tions where printed circuit board space is critical. all members of the adm230l family, except the adm231l and the adm239l, include two internal charge pump voltage converters that allow operation from a single +5 v supply. these converters convert the +5 v input power to the 10 v required for rs-232 output levels. the adm231l and adm239l are designed to operate from +5 v and +12 v sup- plies. an internal +12 v to C12 v charge pump voltage con- verter generates the C12 v supply. the adm2xxl is an enhanced upgrade for the ad2xx family featuring lower power consumption, faster slew rate and opera- tion with smaller (1 m f) capacitors. *internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input +5v to +10v voltage doubler +10v to ?0v voltage inverter 1 m f 16v 1 m f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 adm232l 1 m f 6.3v 1 m f 16v 6 gnd 15 4 5 3 1 2 1 m f 6.3v t1 in rs-232 outputs ttl/cmos inputs* t1 out t2 in r1 out r2 out t2 out r1 in r2 in r1 r2 t2 t1 ttl/cmos outputs rs-232 inputs** 13 10 7 11 8 14 9 12 16
rev. 0 C2C ADM223/adm230lCadm241lCspecifications v cc = +5 v 6 5% (adm230l, 33l, 35l, 37l); v+ = 7.5 v to 13.2 v (adm231l & adm239l); c1Cc4 = 1.0 m f ceramic. all specifications t min to t max unless otherwise noted.) parameter min typ max units test conditions/comments output voltage swing 5 9 volts all transmitter outputs loaded with 3 k w to ground v cc power supply current 2 3.0 ma no load, all t ins = v cc (except ADM223) 3.5 6 ma no load, all t ins = gnd 0.4 1 ma adm231l, adm239l v+ power supply current 1.5 4 ma no load, v+ = 12 v adm231l & adm239l only shutdown supply current 1 5 m a input logic threshold low, v inl 0.8 v t in , en , sd, en, sd input logic threshold high, v inh 2.0 v t in , en , sd, en, sd logic pull-up current 10 25 m at in = 0 v rs-232 input voltage range C30 +30 v rs-232 input threshold low 0.8 1.2 v rs-232 input threshold high 1.7 2.4 v rs-232 input hysteresis 0.2 0.5 1.0 v rs-232 input resistance 3 5 7 k w ttl/cmos output voltage low, v ol 0.4 v ttl/cmos output voltage high, v oh 3.5 v i out = C1.0 ma ttl/cmos output leakage current 0.05 5 m a en = v cc , 0 v r out v cc output enable time (t en ) 250 ns ADM223, adm235l, adm236l, adm239l, adm241l (figure 25. c l = 150 pf) output disable time (t dis ) 50 ns ADM223, adm235l, adm236l, adm239l, adm241l (figure 25. r l = 1 k w ) propagation delay 0.5 m s rs-232 to ttl instantaneous slew rate 1 25 30 v/ m sc l = 10 pf, r l = 3-7 k w , t a = +25 c transition region slew rate 5 v/ m sr l = 3 k w , c l = 2500 pf measured from +3 v to C3 v or C3 v to +3 v output resistance 300 w v cc = v+ = vC = 0 v, v out = 2 v rs-232 output short circuit current 10 ma note 1 sample tested to ensure compliance. specifications subject to change without notice. thermal impedance, q ja n-14 dip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 c/w n-16 dip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 c/w n-20 dip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 c/w n-24 dip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 c/w n-24a dip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 c/w r-16 soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 c/w r-20 soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 c/w r-24 soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 c/w r-28 soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 c/w rs-28 ssop . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 c/w q-14 cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 c/w q-16 cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 c/w q-20 cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 c/w q-24 cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 c/w d-24 ceramic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 c/w operating temperature range commercial (j version) . . . . . . . . . . . . . . . . . . . 0 to +70 c industrial (a version) . . . . . . . . . . . . . . . . C40 c to +85 c storage temperature range . . . . . . . . . . . C65 c to + 150 c lead temperature, soldering . . . . . . . . . . . . . . . . . . +300 c vapour phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220 c esd rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >2000 v *this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specifi- cation is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. v cc = +5 v 6 10% (ADM223, 31l, 32l, 34l, 36l, 38l, 39l, 41l); absolute maximum ratings* (t a = 25 c unless otherwise noted) v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to +6 v v+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . (v cc C 0.3 v) to +14 v vC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 v to C14 v input voltages t in . . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to (v cc + 0.3 v) r in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 v output voltages t out . . . . . . . . . . . . . . . . . . (v+, + 0.3 v) to (vC, C 0.3 v) r out . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to (v cc + 0.3 v) short circuit duration t out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .continuous power dissipation n-14 dip (derate 10 mw/ c above +70 c) . . . . . 800 mw n-16 dip (derate 10.5 mw/ c above +70 c) . . . 840 mw n-20 dip (derate 11 mw/ c above +70 c) . . . . . 890 mw n-24 dip (derate 13.5 mw/ c above +70 c) . . 1000 mw n-24a dip (derate 13.5 mw/ c above +70 c) . . 500 mw r-16 soic (derate 9 mw/ c above +70 c) . . . . . 760 mw r-20 soic (derate 9.5 mw/ c above +70 c) . . . 800 mw r-24 soic (derate 12 mw/ c above +70 c) . . . . 850 mw r-28 soic (derate 12.5 mw/ c above +70 c) . . 900 mw rs-28 ssop (derate 10 mw/ c above +70 c) . . . 900 mw q-14 cerdip (derate 10 mw/ c above +70 c) . . . 720 mw q-16 cerdip (derate 10 mw/ c above +70 c) . . . 800 mw q-20 cerdip (derate 11.2 mw/ c above +70 c) . . . 890 mw q-24 cerdip (derate 12.5 mw/ c above +70 c) . . 1000 mw d-24 ceramic (derate 20 mw/ c above +70 c) . . 1000 mw
ADM223/adm230lCadm241l C3C rev. 0 ordering guide temperature package temperature package temperature package model range option* model range option* model range option* ADM223 adm230l adm231l ADM223ar C40 c to +85 c r-28 adm230ljn 0 c to +70 c n-20 adm231ljn 0 c to +70 c n-14 ADM223ars C40 c to +85 c rs-28 adm230ljr 0 c to +70 c r-20 adm231ljr 0 c to +70 c r-16 adm230lan C40 c to +85 c n-20 adm231lan C40 c to +85 c n-14 adm230lar C40 c to +85 c r-20 adm231lar C40 c to +85 c r-16 adm230laq C40 c to +85 c q-20 adm231laq C40 c to +85 c q-14 adm232l adm233l adm234l adm232ljn 0 c to +70 c n-16 adm233ljn 0 c to +70 c n-20 adm234ljn 0 c to +70 c n-16 adm232ljr 0 c to +70 c r-16 adm233lan C40 c to +85 c n-20 adm234ljr 0 c to +70 c r-16 adm232lan C40 c to +85 c n-16 adm234lan C40 c to +85 c n-16 adm232lar C40 c to +85 c r-16 adm234lar C40 c to +85 c r-16 adm232laq C40 c to +85 c q-16 adm234laq C40 c to +85 c q-16 adm235l adm236l adm237l adm235ljn 0 c to +70 c n-24a adm236ljn 0 c to +70 c n-24 adm237ljn 0 c to +70 c n-24 adm235lan C40 c to +85 c n-24a adm236ljr 0 c to +70 c r-24 adm237ljr 0 c to +70 c r-24 adm235laq C40 c to +85 c d-24 adm236lan C40 c to +85 c n-24 adm237lan C40 c to +85 c n-24 adm236lar C40 c to +85 c r-24 adm237lar C40 c to +85 c r-24 adm236laq C40 c to +85 c q-24 adm237laq C40 c to +85 c q-24 adm238l adm239l adm241l adm238ljn 0 c to +70 c n-24 adm239ljn 0 c to +70 c n-24 adm241ljr 0 c to +70 c r-28 adm238ljr 0 c to +70 c r-24 adm239ljr 0 c to +70 c r-24 adm241lar C40 c to +85 c r-28 adm238lan C40 c to +85 c n-24 adm239lan C40 c to +85 c n-24 adm241ljrs 0 c to +70 c rs-28 adm238lar C40 c to +85 c r-24 adm239lar C40 c to +85 c r-24 adm241lars C40 c to +85 c rs-28 adm238laq C40 c to +85 c q-24 adm239laq C40 c to +85 c q-24 *d = ceramic dip; n = plastic dip; q = cerdip; r = small outline ic (soic); rs = small shrink outline package (ssop). caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ADM223/adm230lCadm241l features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device
ADM223/adm230lCadm241l C4C rev. 0 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 top view (not to scale) adm230l t1 in t2 in t3 in t4 in t5 in t1 out t2 out t3 out t4 out t5 out v+ v v cc c1+ c1 c2+ c2 gnd sd nc nc = no connect figure 1. adm230l dip/soic pin configuration +5v to +10v voltage doubler +10v to ?0v voltage inverter 12 11 10 8 13 1f 16v 7 1f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 t1 in nc gnd adm230l sd rs-232 outputs ttl/cmos inputs * 1f 6.3v 1f 16v 18 t1 out 6 * internal 400k w pull-up resistor on each ttl/cmos input t2 in t3 in t4 in t5 in t2 out t3 out t4 out t5 out t3 19 15 4 5 14 17 16 3 1 2 20 t4 t2 t1 t5 9 1f figure 2. adm230l typical operating circuit 1 2 3 4 5 6 7 14 13 12 11 10 9 8 top view (not to scale) adm231l t1 in t2 in r2 in r1 in t1 ou t t2 out r2 out r1 out v+ v v cc c1+ c1 gnd nc nc = no connect 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view (not to scale) adm231l t1 in r1 in t1 out r1 ou t v+ v cc gnd t2 in r2 in t2 out r2 out v c1+ c1 nc figure 3. adm231l dip & soic pin configurations soic dip +12v to ?2v voltage converter 2 1 3 14 v+ v c+ c t1 in adm231l rs-232 outputs ttl/cmos inputs * 1f 16v t1 out gnd 12 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input t2 in r1 out r2 out t2 out r1 in r2 in 1f 16v r1 6 7 8 9 4 10 11 5 r2 t2 t1 +7.5v to 13.2v ttl/cmos outputs rs-232 inputs ** 13 +5v input v cc 1f figure 4. adm231l typical operating circuit (dip pinout)
ADM223/adm230lCadm241l C5C rev. 0 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input +5v to +10v voltage doubler +10v to ?0v voltage inverter 1f 16v 1f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 adm232l 1f 6.3v 1f 16v 6 gnd 15 4 5 3 1 2 1f 6.3v t1 in rs-232 outputs ttl/cmos inputs * t1 out t2 in r1 out r2 out t2 out r1 in r2 in r1 r2 t2 t1 ttl/cmos outputs rs-232 inputs ** 13 10 7 11 8 14 9 12 16 figure 6. adm232l typical operating circuit * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input +5v input v cc v+ v c1+ c1 c2+ c2 gnd adm233l 7 t1 in rs-232 outputs ttl/cmos inputs * t1 out t2 in r1 out r2 out t2 out r1 in r2 in r1 r2 t2 t1 ttl/cmos outputs rs-232 inputs ** 4 1 18 2 19 5 20 3 8 13 12 17 14 11 15 10 16 v c2 c2+ 9 6 gnd do not make connections to these pins internal ?0v power supply internal +10v power supply figure 8. adm233l typical operating circuit 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 top view (not to scale) adm233l r1 in t2 in r2 in t1 out t2 out r1 out v+ v v cc c1+ c2 c2+ c1 gnd gnd c2+ c2 r2 ou t v t1 in figure 7. adm233l dip pin configuration 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view (not to scale) adm232l t1 in r1 in t1 out r1 out v+ v cc gnd t2 in r2 in t2 out r2 ou t v c1+ c1 c2 c2+ figure 5. adm232l dip/soic pin configuration
ADM223/adm230lCadm241l C6C rev. 0 t1 in adm235l sd rs-232 outputs ttl/cmos inputs * t1 out gnd 11 t2 in t3 in t4 in t5 in t2 out t3 out t4 out t5 out t3 22 16 7 8 15 21 19 4 2 3 1 t4 t2 t1 t5 rs-232 inputs ** ttl/cmos outputs r1 out r1 in r2 in r3 in r4 in r5 in r2 out r3 out r4 out r5 out r1 r5 r4 r3 r2 20 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input en 13 5 24 10 18 14 17 6 9 23 12 +5v input v cc 1f figure 12. adm235l typical operating circuit +5v to +10v voltage doubler +10v to ?0v voltage inverter 11 10 9 7 12 8 1f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 t1 in adm234l rs-232 outputs ttl/cmos inputs * 1f 6.3v 1f 16v t1 out gnd 5 * internal 400k w pull-up resistor on each ttl/cmos input t2 in t3 in t4 in t2 out t3 out t4 out 1f 16v t3 14 3 4 13 2 16 1 15 t4 t2 t1 6 1f figure 10. adm234l typical operating circuit 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view (not to scale) adm234l t1 in t3 in t3 out v+ v cc gnd t2 in t4 in t1 out t4 out v c1+ c1 c2 c2+ t2 out figure 9. adm234l dip/soic pin configuration 1 2 3 7 24 23 22 18 8 9 10 17 16 15 11 12 14 13 4 5 21 20 6 19 top view (not to scale) adm235l t1 in t2 in t3 in t4 in t5 in t1 out t2 out t3 out t4 out t5 out v cc gnd sd en r3 in r4 in r5 in r1 in r2 in r2 out r1 out r3 ou t r4 ou t r5 ou t figure 11. adm235l dip pin configuration
ADM223/adm230lCadm241l C7C rev. 0 t1 in adm236l sd rs-232 outputs ttl/cmos inputs * t1 out gnd 8 t2 in t3 in t4 in t2 out t3 out t4 out t3 19 6 7 18 21 3 1 2 24 t4 t2 t1 rs-232 inputs ** ttl/cmos outputs r1 in r2 in r3 in r1 out r2 out r3 out r3 r2 r1 20 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input en 16 4 23 17 22 5 +5v to +10v voltage doubler +10v to ?0v voltage inverter 14 13 12 10 15 11 1f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 1f 6.3v 1f 16v 1f 16v 9 1f figure 14. adm236l typical operating circuit t1 in adm237l rs-232 outputs ttl/cmos inputs * t1 out gnd 8 t2 in t3 in t4 in t2 out t3 out t4 out t3 19 6 7 18 3 1 2 24 t4 t2 t1 rs-232 inputs ** ttl/cmos outputs r1 in r2 in r3 in r1 out r2 out r3 out r3 r2 r1 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input 16 4 23 17 22 5 +5v to +10v voltage doubler +10v to ?0v voltage inverter 14 13 12 10 15 1f 16v 11 1f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 1f 6.3v 1f 16v t5 in t5 out 21 20 t5 9 1f figure 16. adm237l typical operating circuit 1 2 3 7 24 23 22 18 8 9 10 17 16 15 11 12 14 13 4 5 21 20 6 19 top view (not to scale) adm236l t1 in t2 in t1 out t2 out t3 out v cc gnd sd en r3 in r1 in r2 in r2 ou t r1 out r3 ou t t3 in t4 in t4 out v+ v c1+ c1 c2+ c2 figure 13. adm236l dip/soic pin configuration 1 2 3 7 24 23 22 18 8 9 10 17 16 15 11 12 14 13 4 5 21 20 6 19 top view (not to scale) adm237l t1 in t2 in t1 out t2 out t3 out v cc gnd r3 in r1 in r2 in r2 ou t r1 out r3 ou t t3 in t4 in t4 out v+ v c1+ c1 c2+ c2 t5 in t5 out figure 15. adm237l dip/soic pin configuration
ADM223/adm230lCadm241l C8C rev. 0 t1 in adm238l rs-232 outputs ttl/cmos inputs * t1 out gnd 8 t2 in t3 in t4 in t2 out t3 out t4 out t3 19 5 18 1 2 24 t4 t2 t1 rs-232 inputs ** ttl/cmos outputs r1 in r2 in r3 in r1 out r2 out r3 out r3 r2 r1 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input 3 7 23 4 22 6 +5v to +10v voltage doubler +10v to ?0v voltage inverter 14 13 12 10 15 1f 16v 11 1f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 1f 6.3v 1f 16v 21 20 9 r4 in r4 out r4 16 17 1f figure 18. adm238l typical operating circuit t1 in adm239l nc rs-232 outputs ttl/cmos inputs * t1 out gnd 3 t2 in t3 in t2 out t3 out t3 23 24 16 15 20 13 19 t2 t1 rs-232 inputs ** ttl/cmos outputs r3 in r4 in r5 in r3 out r4 out r5 out r5 r4 r3 14 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input en 9 18 12 10 11 17 +12v to ?2v voltage inverter 7 6 8 1f 16v 5 +5v input v cc v+ v c1+ c1 1f 16v 4 +7.5v to +13.2v input r1 in r2 in r1 out r2 out r2 r1 2 21 22 1 1f figure 20. adm239l typical operating circuit 1 2 3 7 24 23 22 18 8 9 10 17 16 15 11 12 14 13 4 5 21 20 6 19 top view (not to scale) adm238l t1 in r1 in t1 out r2 out t2 out v cc gnd r4 in r2 in r3 in r3 ou t r1 out r4 ou t t2 in t3 in t3 out v+ v c1+ c1 c2+ c2 t4 in t4 out figure 17. adm238l dip/soic pin configuration 1 2 3 7 24 23 22 18 8 9 10 17 16 15 11 12 14 13 4 5 21 20 6 19 top view (not to scale) adm239l r4 in r5 in r1 in r4 out r1 out v cc gnd t3 in t2 in r2 ou t r5 out r3 ou t r3 in t1 out t1 in v+ nc c+ c t3 out r2 in t2 out v en nc = no connect figure 19. adm239l dip/soic pin configuration
ADM223/adm230lCadm241l C9C rev. 0 adm241l sd gnd 10 25 rs-232 inputs ** ttl/cmos outputs r3 in r4 in r5 in r3 out r4 out r5 out r5 r4 r3 24 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input en 18 27 23 19 22 26 r1 in r2 in r1 out r2 out r2 r1 9 4 5 8 t1 in rs-232 outputs ttl/cmos inputs * t1 out t2 in t3 in t4 in t2 out t3 out t4 out t3 20 7 6 3 2 1 t4 t2 t1 +5v to +10v voltage doubler +10v to ?0v voltage inverter 16 15 14 12 17 1 m f 16v 13 1 m f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 1 m f 16v 1 m f 16v 21 28 11 1 m f figure 22. adm241l typical operating circuit ADM223 gnd 10 25 rs-232 inputs ** ttl/cmos outputs r3 in r4 in r5 in r3 out r4 out r5 out r5 r4 r3 24 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input note: receivers r4 and r5 remain active in shutdown. en sd 18 27 23 19 22 26 r1 in r2 in r1 out r2 out r2 r1 9 4 5 8 t1 in rs-232 outputs ttl/cmos inputs * t1 out t2 in t3 in t4 in t2 out t3 out t4 out t3 20 7 6 3 2 1 t4 t2 t1 +5v to +10v voltage doubler +10v to ?0v voltage inverter 16 15 14 12 17 1 m f 16v 13 1 m f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 1 m f 16v 1 m f 16v 21 28 11 1 m f figure 24. ADM223 typical operating circuit 1 2 3 7 28 27 26 22 8 9 10 21 20 19 11 12 18 17 4 5 25 24 6 23 top view (not to scale) 13 14 16 15 adm241l r2 out r2 in r5 in t4 in r3 in t1 out t2 out t3 out t4 out r5 ou t v+ v v cc c1+ c1 c2+ c2 gnd sd r3 ou t en t3 in r4 in r4 ou t r1 in r1 out t1 in t2 in figure 21. adm241l soic/ssop pin configuration 1 2 3 7 28 27 26 22 8 9 10 21 20 19 11 12 18 17 4 5 25 24 6 23 top view (not to scale) 13 14 16 15 ADM223 r2 out r2 in r5 in t4 in r3 in t1 out t2 out t3 out t4 out r5 ou t v+ v v cc c1+ c1 c2+ c2 gnd r3 ou t en sd t3 in r4 in r4 ou t r1 in r1 out t1 in t2 in figure 23. ADM223 soic/ssop pin configuration
ADM223/adm230lCadm241l C10C rev. 0 pin function description mnemonic function v cc power supply input 5 v 10% (+5 v 5% adm233l, adm235l). v+ internally generated positive supply (+10 v nominal) on all parts except adm231l and adm239l. adm231l, adm239l requires external 7.5 v to 13.2 v supply. vC internally generated negative supply (C10 v nominal). gnd ground pin. must be connected to 0 v. c+ (adm231l and adm239l only). external capacitor (+ terminal) is connected to this pin. cC (adm231l and adm239l only). external capacitor (C terminal) is connected to this pin. c1+ (adm230l, adm232l, adm234l, adm236l, adm237l, adm238l, adm241l) external capacitor (+ termi nal) is connected to this pin. (adm233l) the capacitor is connected internally and no external connection to this pin is required. c1C (adm230l, adm232l, adm234l, adm236l, adm237l, adm238l, adm241l) external capacitor (C termi nal) is connected to this pin. (adm233l) the capacitor is connected internally and no external connection to this pin is required. c2+ (adm230l, adm232l, adm234l, adm236l, adm237l, adm238l, adm241l) external capacitor (+ terminal) is connected to this pin. (adm233l) internal capacitor connections, pins 11 and 15 must be connected together. c2C (adm230l, adm232l, adm234l, adm236l, adm237l, adm238l, adm241l) external capa citor (C terminal) is connected to this pin. (adm233l) internal capacitor connections, pins 10 and 16 must be connected together. t in transmitter (driver) inputs. these inputs accept ttl/cmos levels. an internal 400 k w pull-up resistor to v cc is connected on each input. t out transmitter (driver) outputs. these are rs-232 levels (typically 10 v). r in receiver inputs. these inputs accept rs-232 signal levels. an internal 5 k w pull-down resistor to gnd is connected on each input. r out receiver outputs. these are ttl/cmos levels. en /en enable input. active low on adm235l, adm236l, adm239l, adm241l. active high ADM223. this input is used to enable/disable the receiver outputs. with en = low (en = high ADM223), the receiver outputs are enabled. with en = high (en = low ADM223), the outputs are placed in a high impedance state. this facility is useful for connecting to microprocessor systems. sd/ sd shutdown input. active high on adm235l, adm236l, adm241l. active low on ADM223. with sd = high on the adm235l, adm236l, adm241l, the charge pump is disabled, the receiver outputs are placed in a high impedance state and the driver outputs are turned off. with sd low on the ADM223, the charge pump is disabled, the driver outputs are turned off and all receivers except r4 and r5 are placed in a high impedance state. in shutdown, the power consumption reduces to 5 m w. nc no connect. no connections are required to this pin. table i. adm235l, adm236l, adm241l truth table transmitters receivers sd en status t1Ct5 r1Cr5 0 0 normal operation enabled enabled 0 1 normal operation enabled disabled 1 0 shutdown disabled disabled table ii. ADM223 truth table transmitters receivers sd en status t1Ct4 r1Cr3 r4, r5 0 0 shutdown disabled disabled disabled 0 1 shutdown disabled disabled enabled 1 0 normal operation enabled disabled disabled 1 1 normal operation enabled enabled enabled
ADM223/adm230lCadm241l C11C rev. 0 4 5.0 6 3.0 10 8 4.0 v cc ?v v out ?v v out (1 o/p loaded) v out (all o/ps loaded) figure 27. transmitter output voltage vs. v cc 0 40 2 0 6 4 8 10 30 20 10 | v | v out ?v i out ?ma v+ figure 25. charge pump v+, vC vs. current 12 0 8 2 0 6 4 8 10 6 4 2 t out ?v t out high t out low i out ?ma figure 28. transmitter output voltage vs. current 18 4 2500 10 6 8 0 16 12 14 2000 1500 1000 500 capacitive load ?pf slew rate ?v/s figure 26. transmitter slew rate vs. load capacitance 0 5 100 3 300 200 4 v cc ?v v+, v?impedance ? w v?(loaded) v?(unloaded) v+ (unloaded) v+ (loaded) figure 29. charge pump impedance vs. v cc
ADM223/adm230lCadm241l C12C rev. 0 10 90 100 0% 5v 0.8 v a3 5v 5 b l w 1ms h o figure 30. charge pump, v+, vC exiting shutdown 10 90 100 0% 5v 0.8 v a3 5 b l w 5s h o figure 31. transmitter output loaded slew rate 10 90 100 0% 5v 0.8 v a3 5 b l w 1s h o figure 32. transmitter output unloaded slew rate general information the ADM223/adm230lCadm241l family of rs-232 drivers/ receivers are designed to solve interface problems by meeting the eia-232-e specifications while using a single digital +5 v supply. the eia-232-e standard requires transmitters which will deliver 5 v minimum on the transmission channel and receivers which can accept signal levels down to 3 v. the ADM223/adm230lCadm241l meet these requirements by integrating step up voltage converters and level shifting trans- mitters and receivers onto the same chip. cmos technology is used to keep the power dissipation to an absolute minimum. a comprehensive range of transmitter/receiver combinations is available to cover most communications needs. the ADM223, adm230l, adm235l, adm236l and adm241l are particularly useful in battery powered systems as they feature a low power shutdown mode which reduces power dissipation to less than 5 m w. the adm233l and adm235l are designed for applications where space saving is important as the charge pump capacitors are molded into the package. the adm231l and adm239l include only a negative charge pump converter and are intended for applications where a posi- tive 12 v is available. to facilitate sharing a common line or for connection to a micro- processor data bus the adm235l, adm236l, adm239l and adm241l feature an enable (en, en ) function. when disabled, the receiver outputs are placed in a high impedance state. circuit description the internal circuitry in the adm230lCadm241l consists of three main sections. these are: (a) a charge pump voltage converter (b) rs-232 to ttl/cmos receivers (c) ttl/cmos to rs-232 transmitters charge pump dc-dc voltage converter the charge pump voltage converter consists of an oscillator and a switching matrix. the converter generates a 10 v supply from the input 5 v level. this is done in two stages using a switched capacitor technique as illustrated in figures 33 and 34. first, the 5 v input supply is doubled to 10 v using capacitor c1 as the charge storage element. the 10 v level is then in- verted to generate C10 v using c2 as the storage element. s1 s3 v+ = 2v cc s2 s4 internal oscillator c1 c3 v cc gnd v cc figure 33. charge-pump voltage doubler
ADM223/adm230lCadm241l C13C rev. 0 enable input the adm235, adm239, adm241l and ADM223 feature an enable input used to enable or disable the receiver outputs. the enable input is active low on the adm235l, adm239l, adm241l and active high on the ADM223. refer to tables i and ii. when disabled, all receiver outputs are placed in a high impedance state. this function allows the outputs to be con- nected directly to a microprocessor data bus. it can also be used to allow receivers from different devices to share a common data line. the timing diagram for the enable function is shown in figure 35. t en t dis 3v 0v r out 3.5v 0.8v v oh ?0.1v v vol + 0.1v en* *polarity of en is reversed for ADM223. figure 35. enable timing application hints driving long cables in accordance with the eia-232-e standard, long cables are per- missible provided that the total load capacitance does not exceed 2500 pf. for longer cables which do exceed this, then it is pos- sible to trade off baud rate vs. cable length. large load capaci- tances cause a reduction in slew rate, and hence the maximum transmission baud rate is decreased. the adm230l-adm241l are designed so that the slew rate reduction with increasing load capacitance is minimized. for the receivers, it is important that a high level of noise immu- nity be inbuilt so that slow rise and fall times do not cause mul- tiple output transitions as the signal passes slowly through the transition region. the adm230l-adm241l have 0.5 v of hys- teresis to guard against this. this ensures that, even in noisy en- vironments, error-free reception can be achieved. high baud rate operation the adm230l-adm241l feature high slew rates permitting data transmission at rates well in excess of the eia-232-e speci- fication. the drivers maintain 5 v signal levels at data rates up to 100-kb/s under worst-case loading conditions. s1 s3 s2 s4 internal oscillator c2 c4 v? = ?(v+) gnd v+ gnd from voltage doubler figure 34. charge-pump voltage inverter capacitors c3 and c4 are used to reduce the output ripple. their values are not critical and can be reduced if higher levels of ripple are acceptable. the charge pump capacitors c1 and c2 may also be reduced at the expense of higher output imped- ance on the v+ and vC supplies. the v+ and vC supplies may also be used to power external cir- cuitry if the current requirements are small. transmitter (driver) section the drivers convert ttl/cmos input levels into eia-232-e output levels. with v cc = +5 v and driving a typical eia-232-e load, the output voltage swing is 9 v. even under worst case conditions the drivers are guaranteed to meet the 5 v eia-232-e minimum requirement. the input threshold levels are both ttl and cmos compat- ible with the switching threshold set at v cc /4. with a nominal v cc = 5 v the switching threshold is 1.25 v typical. unused in- puts may be left unconnected, as an internal 400 k w pull-up re- sistor pulls them high forcing the outputs into a low state. as required by the eia-232-e standard, the slew rate is limited to less than 30 v/ m s without the need for an external slew limit- ing capacitor and the output impedance in the power-off state is greater than 300 w . receiver section the receivers are inverting level shifters which accept eia- 232-e input levels ( 5 v to 15 v) and translate them into 5 v ttl/cmos levels. the inputs have internal 5 k w pull-down resistors to ground and are also protected against overvoltages of up to 30 v. the guaranteed switching thresholds are 0.8 v minimum and 2.4 v maximum which are well within the 3 v eia-232-e requirement. the low level threshold is deliberately positive as it ensures that an unconnected input will be inter- preted as a low level. the receivers have schmitt trigger inputs with a hysteresis level of 0.5 v. this ensures error-free reception for both noisy inputs and for inputs with slow transition times. shutdown (sd) the ADM223, adm230l, adm235l, adm236l and adm241l feature a control input that may be used to disable the part and reduce the power consumption to less than 5 m w. this is very useful in battery operated systems. during shut- down the charge pump is turned off, the transmitters are dis- abled and all receivers except r4 and r5 on the ADM223 are put into a high-impedance disabled state. receivers r4 and r5 on the ADM223 remain enabled during shutdown. this feature allows monitoring external activity such as ring indicator moni- toring while the device is in a low power shutdown mode. the shutdown control input is active high on all parts except the ADM223 where it is active low. refer to tables i and ii.
ADM223/adm230lCadm241l C14C rev. 0 outline dimensions dimensions shown in inches and (mm). 14-lead plastic dip (n-14) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 0.210 (5.33) 0.200 (5.05) 0.125 (3.18) 0.795 (20.19) 0.725 (18.42) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) bsc 0.070 (1.77) 0.045 (1.15) seating plane 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) pin 1 0.280 (7.11) 0.240 (6.10) 7 8 14 1 16-lead plastic dip (n-16) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) pin 1 0.280 (7.11) 0.240 (6.10) 9 16 1 8 0.840 (21.33) 0.745 (18.93) 0.210 (5.33) 0.200 (5.05) 0.125 (3.18) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) bsc seating plane 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) 0.070 (1.77) 0.045 (1.15) 16-lead soic (r-16) pin 1 0.299 (7.60) 0.291 (7.40) 0.419 (10.65) 0.404 (10.26) 1 16 9 8 0.018 (0.46) 0.014 (0.36) 0.050 (1.27) bsc 0.107 (2.72) 0.089 (2.26) 0.413 (10.50) 0.348 (10.10) 0.010 (0.25) 0.004 (0.10) 0.015 (0.38) 0.007 (1.18) 0.045 (1.15) 0.020 (0.50) 0.364 (9.246) 0.344 (8.738) 14-lead cerdip (q-14) 0.300 (7.62) ref 0.012 (0.305) 0.008 (0.203) 15 0 pin 1 0.271 (6.89) 0.240 (6.09) 7 8 1 14 0.780 (19.81) 0.02 (0.5) 0.016 (0.406) 0.06 (1.52) 0.05 (1.27) 0.125 (3.17) min 0.11 (2.79) 0.099 (2.28) seating plane 0.163 (4.14) 0.133 (3.378) 0.21 (5.33) 0.15 (3.81) 16-lead cerdip (q-16) 15 0 0.300 (7.62) ref 0.012 (0.305) 0.008 (0.203) pin 1 1 8 9 16 0.271 (6.89) 0.240 (6.09) 0.780 (19.81) 0.02 (0.5) 0.016 ( 0.406 ) 0.06 (1.52) 0.05 ( 1.27 ) 0.125 (3.17) min 0.11 (2.79) 0.099 ( 2.28 ) seating plane 0.163 (4.14) 0.133 (3.378) 0.21 (5.33) 0.15 (3.81)
ADM223/adm230lCadm241l C15C rev. 0 20-lead plastic dip (n-20) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) pin 1 0.280 (7.11) 0.240 (6.10) 20 1 11 10 0.210 (5.33) 0.200 (5.05) 0.125 (3.18) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) bsc 0.070 (1.78) 0.045 (1.15) seating plane 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) 1.060 (26.90) 0.925 (23.50) 20-lead soic (r-20) pin 1 0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65) 0.3937 (10.00) 1 20 11 10 0.0125 (0.32) 0.0091 (0.23) 0.0500 (1.27) 0.0157 (0.40) 8 0 0.0291 (0.74) 0.0098 (0.25) x 45 0.5118 (13.00) 0.4961 (12.60) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.0118 (0.30) 0.0040 (0.10) 0.1043 (2.65) 0.0926 (2.35) 24-lead plastic dip (n-24) pin 1 0.260 0.001 (6.61 0.03) 24 1 13 12 0.32 (8.128) 0.30 (7.62) 0.011 (0.28) 0.009 (0.23) 15 0 0.02 (0.5) 0.016 (0.41) 0.130 (3.30) 0.128 (3.25) 0.07 (1.78) 0.05 (1.27) seating plane 1.228 (31.19) 1.226 (31.14) 0.11 (2.79) 0.09 (2.28) notes 1. lead no. 1 identified by dot or notch 2. plastic leads will be either solder dipped or tin plated in accordance with mil-m-38510 requirements. 20-lead cerdip (q-20) 0.32 (8.128) 0.29 (7.366) 0.011 (0.28) 0.009 (0.23) 15 0 pin 1 0.28 (7.11) 0.24 (6.1) 10 11 1 20 0.97 (24.64) 0.935 (23.75) 0.15 (3.8) 0.125 (3.18) 0.02 (0.5) 0.016 (0.41) 0.07 (1.78) 0.05 (1.27) 0.11 (2.79) 0.09 (2.28) 0.18 (4.57) 0.125 (3.18) seating plane 0.20 (5.0) 0.14 (3.56) lead no. 1 identified by dot or notch 24-lead ceramic dip (d-24) 0.015 (0.38) 0.008 (0.20) 0.620 (15.75) 0.590 (14.99) 0.005 (0.13) pin 1 0.098 (2.49) 0.610 (15.49) 0.500 (12.70) 13 12 24 1 0.225 (5.72) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.150 (3.81) seating plane 0.110 (2.79) 0.090 (2.29) 0.075 (1.91) 0.015 (0.38) 0.200 (5.08) 0.120 (3.05) 1.290 (32.77) 24-lead plastic dip (n-24a) pin 1 0.55 (13.97) 0.53 (13.47) 24 1 13 12 0.606 (15.4) 0.594 (15.09) 0.012 (0.305) 0.008 (0.203) 15 0 0.16 (4.07) 0.14 (3.56) 0.2 (5.08) max 0.065 (1.66) 0.045 (1.15) 0.105 (2.67) 0.095 (2.42) 1.25 (31.75) 1.24 (31.5) 0.02 (0.508) 0.015 (0.381) 0.175 (4.45) 0.12 (3.05) seating plane
c1900C18C4/94 printed in u.s.a. 24-lead cerdip (q-24) pin 1 1 24 12 13 1 0.295 (7.493) max seating plane 0.225 (5.715) max 0.125 (3.175) min 0.070 (1.778) 0.020 (0.508) 0.180 (4.572) max 1.290 (32.77) max 0.021 (0.533) 0.015 (0.381) typ 0.065 (1.651) 0.055 (1.397) typ 0.110 (2.794) 0.090 (2.286) typ 0.320 (8.128) 0.290 (7.366) 15 0 0.012 (0.305) 0.008 (0.203) typ 1. lead no. 1 identified by dot or notch. 2. cerdip leads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements. 24-lead soic (r-24) 0.013 (0.32) 0.009 (0.23) 0.042 (1.067) 0.018 (0.447) 6 0 0.03 (0.76) 0.02 (0.51) pin 1 0.299 (7.6) 0.291 (7.39) 0.414 (10.52) 0.398 (10.10) 13 12 1 24 1. lead no. 1 identified by a dot. 2. soic leads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements 0.019 (0.49) 0.014 (0.35) 0.05 (1.27) bsc 0.096 (2.44) 0.089 (2.26) 0.608 (15.45) 0.596 (15.13) 0.01 (0.254) 0.006 (0.15) 28-lead soic (r-28) 0.019 (0.49) 0.014 (0.35) 0.05 (1.27) bsc 0.708 (18.02) 0.696 (17.67) 0.01 (0.254) 0.006 (0.15) 0.096 (2.44) 0.089 (2.26) 0.013 (0.32) 0.009 (0.23) 0.042 (1.067) 0.018 (0.457) 6 0 0.03 (0.76) 0.02 (0.51) pin 1 0.299 (7.6) 0.291 (7.39) 0.414 (10.52) 0.398 (10.10) 15 14 1 28 1. lead no. identified by a dot. 2. soicleads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements. 28-lead ssop (rs-28) 1. lead no. 1 identified by a dot. 2. leads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements 0.009 (0.229) 0.005 (0.127) 0.037 (0.94) 0.022 (0.559) 8 0 0.0256 (0.65) bsc 0.407 (10.34) 0.397 (10.08) 0.008 (0.203) 0.002 (0.050) 0.07 (1.78) 0.066 (1.67) pin 1 15 14 1 28 0.311 (7.9) 0.301 (7.64) 0.212 (5.38) 0.205 (5.207) C16C

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